mpd8021 micrel 11-4 1997 mpd8021 e ? semicustom high-voltage array summary information general description the mpd8021 is a semicustom, high-voltage, mixed-mode, power asic (application specific integrated circuit) suitable for quantities from 10 to 100,000s of pieces. clients can begin designing proprietary asics using a low-cost spice simulator and the free mpd8021 design kitavailable for downloading via the internet. technology the mpd8021 features bipolar/cmos/dmos high-voltage technology and is fabricated using micrels proprietary bcd5 process to combine high-speed, low-voltage digital and ana- log circuits with high-voltage dmos power drive circuits on a single chip. all logic and analog circuitry is powered from a single +3v to +12v supply. the high-voltage portion functions at voltages from +20v to over +100v and includes a charge pump. rapid turnaround micrel delivers rapid turnaround by applying a unique metal interconnect pattern, based on the clients design, to a stock mpd8021 wafer. to facilitate a rapid and low-cost design approach, micrel offers mpd8021 development programs that range from limited assistance to full turnkey. when you are ready for production, count on micrels proven fab and test group to provide timely deliveries of high-quality, fully-tested, proprietary ics. low-cost development there is no cost or obligation to begin developing your own mpd8021-based custom ic. kit parts which are actual working designs, featuring access to many internal functions, are available for breadboarding circuits. mpd8021 die (0.192" 0.200") features ? 12 n-channel, 100v, 200ma, 10 w , fully-floating dmos power fets (can be paralleled for 100v, 2.4a, 0.83 w single, half-bridge, or bilateral switches) ? 40 high-voltage pmos fets (for level shifting, high-voltage amplifiers) ? 12 high-voltage 200 w , dmos fets (for level shifting, voltage amplifiers) ? 20 high-voltage, grounded-source, dmos fets (for level shifting, current mirrors) ? >100 uncommitted cmos gates ? 12 cmos/ttl i/o buffers ? 13 low-voltage cmos tile arrays (for op amps, comparators, digital circuitry) ? 14 dual-collector pnps and 12 npns (for trimmed bandgaps, low-offset amplifiers or com- parators, temperature sensor) ? 3-bit trimming network (for production trimmed bandgaps or offsets) ? high- and low-value resistors and capacitors (>1m w total resistance, 45pf total capacitance) ? 12v and 6v zener diodes (gate-to-source clamps, voltage references) ? 67 i/o pads (36 include 2kv esd protection) ? guaranteed C55 c to +150 c operation ? several package options ? low-cost prototyping program ? design support via internet applications ?2 f and 3 f motor control ? high-voltage, controlled-slew, bus drivers ? high-voltage display drivers ? lamp drivers with current limit and overtemperature protection ? relay and solenoid drivers ? half- and full-bridge drivers ? multioutput switching power supplies ? high-voltage linear power supplies ? high-voltage signal processing mpd8021 world-wide web site ? http://www.micrel.com select e or custom solutions ? e-mail: help@ezanalog.com
1997 11-5 mpd8021 micrel 1 1 absolute maximum ratings dc input voltage negative, any pin (v il ), note 1 .................. v sub C 0.5v dc input voltage positive esd pin (v ih ), note 2 ........................ v + + 0.5v low-voltage supply differential, note 3 .................. +16.5v dmos output device breakdown (bv dss ), note 4 . +110v dmos drain current continuous (i d(max) ), note 5 .................................... 0.2a pulsed (i d(pulse) ), note 6 .......................................... 0.5a dmos gate drive voltage (v gs(max) ), note 7 ............ 20v standard esd structure voltage (v esd ), note 8 .......... 2kv storage temperature (t s ) ....................... C65 c to +150 c general note: devices are esd protected; however, handling precau- tions are recommended. note 1: v sub is the substrate bias voltage. note 2: v + is the positive esd clamp potential, user specificed up to +100v. note 3: maximum voltage across low-voltage analog or digital mos. note 4: dmos source-to-body shorted to substrate at 0v. note 5: v gs = 15v. note 6: 5 m s pulse, 10% duty cycle. note 7: measured relative to source-to-body short. note 8: measured between any two pins. operating ratings ambient temperature (t a ) ....................... C55 c to +125 c electrical and physical summary bonding pads .................................................................. 67 2kv esd pads ................................................................ 36 die size ............................................... 0.222 in. 0.182 in. cmos output buffer tiles .............................................. 12 cmos analog tiles ......................................................... 13 high-power dmos ................................................ 12@10 w bipolar devices split-collector pnp ....................................................... 14 npn ............................................................................. 14 zener diodes ................................................................ 10 cmos logic devices nmos ....................................................................... 354 pmos ........................................................................ 354 resistance p-well ...................................................................... 1m w n+ ............................................................................ 20k w polysilicon .......................................................up to 50k w capacitance ................................................................ 45pf trimming range ......................................................... 3 bits mpd8021-0002 kit part high-voltage characterization array ? high-voltage npn transistors ............................................ 4 (includes matching pair) high-voltage pnp transistor .............................................. 1 high-voltage p-channel fets ........................................... 2 analog and digital low-voltage mosfets ......................... 8 expitaxial jfet ................................................................. 1 200 w and 10 w high-voltage dmos transistors ................. 3 6v and 12v zener diodes ................................................. 2 small schottky diode ......................................................... 1 esd input protection structures ........................................ 2 high-value resistor (100k) ................................................. 1 low-value resistor (7.6k) ................................................... 1 low-value polysilicon resistor ........................................... 1 ? this device is suitable for curve tracer or bench-top characterization of various device types included in the mpd8021 array. this device is a supplement to the design information available in the internet design kit. mpd8021-0001 kit part high-voltage pwm controller ? high-voltage push-pull output stages ................................ 6 with cmos to high-voltage level shifters and crossover protection logic high-voltage charge pump for high-side drive with integral high-side current mirror bandgap reference ............................................................ 1 with ptat voltage output (usable for thermal shutdown) op amp ............................................................................. 1 comparators ..................................................................... 4 floating logic input undervoltage lockout ? digital cells and miscellaneous components are not accessible from the pins of this device. ordering information part number type temperature range package mic8021-xxxx* custom C55 c to +125 c customer specified mic8021-0001 kit part C55 c to +125 c 68-pin plcc MIC8021-0002 kit part C55 c to +125 c 68-pin plcc * custom part number. package markings customer specificed.
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